1. Technical Field
Embodiments of the present disclosure may generally relate to semiconductor devices relating to the prevention of a potential difference between signals from being reversed, and semiconductor systems including the semiconductor devices.
2. Related Art
Generally, a semiconductor device such as a dynamic random access memory (DRAM) may receive data from a chipset (for example, controller) to store the data therein during a write operation. Also, the semiconductor device may output the stored data to the chipset during a read operation. Meanwhile, in a synchronous semiconductor system, both a chipset and a memory may operate in synchronization with a system clock signal. However, when the data is outputted from the chipset to the memory, a skew between the data and the system clock signal may occur. This skew occurs because the loading and trace of the system clock signal are different from those of the data and distances between the chipset and a plurality of memories which are different from each other if the semiconductor system includes the plurality of memories.
In order to reduce the skew between the data and the system clock signal, when the data is outputted from the chipset to the memory, the data may be outputted together with a data strobe signal DQS. The data strobe signal DQS is what is called an echo clock and has the same loading and trace as the data. Accordingly, if the memory performs strobing of the data using the data strobe signal, it may be possible to minimize the skew that occurs due to the loading difference and the trace difference between the system clock signal and the data.